1. Field of the Invention
The present invention relates to an asymmetry detection circuit for detecting the asymmetry of alternating current signals and a detection method of the same.
2. Description of the Related Art
In an asymmetry correction circuit or the like, in order to correct the asymmetry of alternating current signals, first the asymmetry of an input signal must be detected.
Conventionally, the asymmetry of alternating current signals has been detected by comparing the bias voltages of the signals with an intermediate potential of a signal amplitude. FIG. 4 shows an example of the conventional asymmetry detection circuit. As illustrated, this asymmetry detection circuit 200 is comprised of peak hold circuits 210 and 220, an intermediate voltage detection circuit 230, and an asymmetry processing circuit 240.
The peak hold circuit 210 holds the upper limit value (positive peak level SPK1) of an input signal Sin, while the peak hold circuit 220 holds the lower limit value (negative peak level SPK2) of the same input signal Sin.
The intermediate voltage detection circuit 230 detects the intermediate voltage of the input signal Sin in accordance with the positive peak level SPK1 and the negative peak level SPK2 found by the peak hold circuits 210 and 220.
Here, assume that, for example, the input signal Sin has the waveform shown in FIG. 5. The peak hold circuit 210 detects the positive peak level SPK1 of this input signal Sin, while the peak hold circuit 220 detects the negative peak level SPK2. The intermediate voltage detection circuit 230 finds an intermediate voltage V2 of the input signal Sin, by the following equation based on the positive and negative peak levels SPK1 and SPK2 and outputs a signal SM indicating the intermediate voltage to the asymmetry processing circuit 240.
V2=(SPK1xe2x88x92SPK2)/2xe2x80x83xe2x80x83(1)
Namely, the intermediate voltage V2 is the voltage in the middle of the positive peak level SPK1 and the negative peak level SPK2 of the input signal Sin in the waveform of the input signal Sin shown in FIG. 5 and is a voltage value where a=b stands as illustrated.
The asymmetry processing circuit 240 calculates the asymmetry of the signal Sin according to the bias voltage V1 of the input signal Sin and the intermediate voltage V2 thereof.
The asymmetry of alternating current signals is defined as the ratio of upper and lower peak voltages with respect to the direct current voltage level by which the duty ratio of the alternating current signals becomes 50%. The asymmetry processing circuit 240 can calculate the asymmetry of the input signal Sin based on the bias voltage V1 of the input signal Sin and the intermediate voltage V2 detected by the intermediate voltage detection circuit 230 according to this definition.
Summarizing the problem to be solved by the invention, in a conventional asymmetry detection circuit, in order to find the asymmetry of an input signal, first the positive and negative peak levels of the,signal are detected by the peak hold circuits, and then the intermediate voltage V1 of the signal amplitude is detected in accordance with the result. Therefore, the positive peak hold circuit and the negative peak hold circuit become necessary. The precision of the found intermediate voltage is largely governed by the holding characteristics of these circuits.
On the other hand, there is no problem as long as the voltage applied to the alternating current signal as the reference bias voltage V1 is clear, but if an offset or the like of the signal occurs in the middle of the path, the precision of the bias voltage V1 is lowered. For example, when viewed by the path up to a comparison circuit for comparing the bias voltage V1 and the intermediate voltage V2 of the amplitude of the signal (not illustrated: for example, existing inside the asymmetry processing circuit 240), the precision of the two are liable to differ and the precision of detection of the asymmetry is liable to fall due to an offset occurring in the peak hold circuit for finding the intermediate voltage V2.
In order to prevent such a fall of the precision of detection of asymmetry, a correction must be carried out in each circuit or the precision of detection of each circuit block must be raised, so there are the disadvantages of increased complexity of the system, sensitivity to fluctuations of measurement conditions or the signal level, and susceptability to interference.
An object of the present invention is to provide an asymmetry detection circuit having a simple circuit configuration capable of realizing reliable detection without depending upon the signal level and realizing high precision asymmetry detection almost entirely free from the influence of voltage offset or the like and a detection method of the same.
To attain the above object, according to a first aspect of the invention, there is provided an asymmetry detection circuit having an alternating current separation means for outputting an alternating current component of an input signal, a clamping means for adding a predetermined bias voltage to the alternating current signal obtained from said alternating current separation means, a comparing means for comparing the output of said clamping means with a reference voltage in accordance with said bias voltage and outputting a pulse signal in accordance with the duty ratio of the output signal of said clamping means in accordance with the related comparison result, a voltage/current converting means for converting said pulse signal to a current signal, an integrating means for integrating said current signal and outputting an integrated signal, and a filter for eliminating the alternating current component of said integrated signal and outputting a direct current component.
Preferably, said alternating current separation means comprises a capacitor cutting off the direct current component.
Preferably, said integrating means comprises a capacitor charged or discharged by said current signal.
Preferably, said filter comprises a low pass filter.
According to a second aspect of the present invention, there is provided an asymmetry detection method for detecting the asymmetry of an input signal, comprised of the steps of cutting off a direct current component of said input signal and outputting an alternating current component, adding a predetermined bias voltage to said alternating current component and clamping said input signal by the related bias voltage, comparing said clamped signal and the reference voltage in accordance with said bias voltage and outputting a pulse signal representing the duty ratio of said clamped signal in accordance with the related comparison result, converting said pulse signal to a current signal, integrating said current signal and outputting an integrated signal, and eliminating the alternating current component of said integrated signal and outputting the direct current component.